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Internvl fix (#38946)

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* Image processor compile fix (#38540)

* Added a compile-friendly versiom of resize to BaseImgProcessorFast

* Changed qwen2 processor to use its parent class .resize

* Style

* underlined issue only happens on AMD w/ comment and bool check

* Fixed some utils functions

* Fixed the same issue for bridgetower

* Fixed the same issue for llava_next

* Repo consistency for llava onevision

* Update src/transformers/image_processing_utils_fast.py

Co-authored-by: Mohit Sharma <mohit21sharma.ms@gmail.com>

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Co-authored-by: Mohit Sharma <mohit21sharma.ms@gmail.com>

* Added an Expectation to an internvl test

* Made qwen2_vl use the resize method of its parent clas

* Changed to torch.where

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Co-authored-by: Mohit Sharma <mohit21sharma.ms@gmail.com>
This commit is contained in:
Rémi Ouazan
2025-06-26 13:44:59 +02:00
committed by GitHub
parent f85b47d1b8
commit 25c44d4b68
7 changed files with 53 additions and 8 deletions
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tests/models/internvl/test_modeling_internvl.py
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@@ -705,6 +705,7 @@ class InternVLLlamaIntegrationTest(unittest.TestCase):
("xpu", 3): torch.tensor([-9.8750, -0.5703, 1.4297, -10.3125, -10.3125], dtype=torch.float16),
("cuda", 7): torch.tensor([-9.8750, -0.4861, 1.4648, -10.3359, -10.3359], dtype=torch.float16),
("cuda", 8): torch.tensor([-9.8906, -0.4995, 1.4473, -10.3359, -10.3438], dtype=torch.float16),
("rocm", (9, 5)): torch.tensor([ -9.8906, -0.4976, 1.4502, -10.3359, -10.3438], dtype=torch.float16),
}
) # fmt: skip
expected_logits = torch.tensor(expected_logits_all.get_expectation(), dtype=torch.float16)